EDN

Low Power LDO Design Techniques for Really Small Profile Applications, Part 1

A key challenge to the ultra-miniaturization of electronic systems is power management. As any EE knows, when overall system sizes shrink the amount of area available for energy storage and energy ...
EDN

Low Power LDO Design Techniques for Really Small Profile Applications, Part 2

In our previous post Low Power LDO Design Techniques for Really Small Profile Applications, Part 1, we reviewed LDO design tradeoffs using an NMOS pass transistor. This design approach is proven good ...